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SiFive, a designer of chips primarily based on the RISC-V computing platform, introduced a sequence of recent AI chips for high-performance AI workloads.
The SiFive Intelligence XM Sequence is designed for accelerating excessive efficiency AI workloads. That is the primary mental property from SiFive to incorporate a extremely scalable AI matrix engine, which accelerates time to marketplace for semiconductor firms constructing system on chip options for edge IoT, client gadgets, subsequent technology electrical and/or autonomous autos, knowledge facilities, and past.
As a part of SiFive’s plan to assist clients and the broader RISC-V ecosystem, SiFive additionally introduced its intention to open supply a reference implementation of its SiFive Kernel Library (SKL).
The announcement was made at a SiFive press occasion, Tuesday, in Santa Clara, the place executives mentioned the management function the RISC-V structure is taking part in on the core of AI options throughout a various vary of market leaders, and supplied an replace on SiFive’s technique, roadmap and enterprise momentum.
The open resolution
Patrick Little, CEO of SiFive, mentioned in an interview with VentureBeat that clients within the semiconductor, programs and client markets have come to understand the software program technique behind SiFive and RISC-V.
He famous that merchandise with greater than 10 billion SiFive cores have shipped so far. And Little famous that SiFive has invested greater than $500 million in R&D and it’s promoting to the highest semiconductor leaders and hyperscalers. The corporate has greater than 400 design wins.
The RISC-V structure has a software program that’s an open commonplace interface, which means any sorts of cores that connect with it. Meaning clients who use SiFive designs can select their very own accelerators for AI and different functions with out having to fret about breaking software program compatibility, Little mentioned.
Whereas huge leaders in AI like Nvidia can use their very own proprietary graphics processing unit (GPU) architectures, smaller firms use their very own breed of accelerators, he mentioned. However software program programmers don’t need to study a brand new language each time a brand new accelerator comes alongside, Little mentioned. So the hyperscalars and chip firms need to use RISC-V options like SiFive so that they don’t should preserve rewriting their software program, he mentioned.
The RISC-V open commonplace software program interface permits for the swish evolution of the RISC-V commonplace over time and it de-risks the answer past a single proprietary vendor.
SiFive has been steadily shifting up a meals chain, beginning within the Nineteen Nineties with embedded cores and including its first vector processor in 2021. And now it’s including AI options. Clients can use it as an information circulate processor because the entrance finish to their processor to go along with their altering backend AI accelerators.
“They don’t need to preserve writing to the AI software program. So we put a RISC-V vector processor in entrance of that. The AI processors preserve altering quick. The fashions preserve altering. Software program writers need to write to one thing that shall be round in 15 years,” he mentioned. “We’re one of many few firms that may fill that hole. And as we speak we introduced personal accelerator, or matrix multiplication engine, and we’re doing the XM product line to completement what we did in vector processing. It’s a matrix multiplication engine.”
Clients who need an alternative choice to Nvidia can flip to a different supply, however they don’t need that rival to be one other proprietary resolution. Quite, they like RISC-V because it gives many rival firms behind it, Little mentioned.
“We imagine our resolution can scale to Nvidia degree efficiency,” he mentioned.
“Many firms are seeing the advantages of an open processor commonplace whereas they race to maintain up with the speedy tempo of change with AI. AI performs to SiFive’s strengths with efficiency per watt and our distinctive means to assist clients customise their options,” mentioned Little. “We’re already supplying our RISC-V options to 5 of the Magnificent 7 firms, and as firms pivot to a ‘software program first’ design technique we’re engaged on new AI options with all kinds of firms from automotive to datacenter and the clever edge and IoT.”
SiFive’s new XM Sequence gives a particularly scalable and environment friendly AI compute engine. By integrating scalar, vector, and matrix engines, XM Sequence clients can benefit from very environment friendly reminiscence bandwidth. The XM Sequence additionally continues SiFive’s legacy of providing extraordinarily excessive efficiency per watt for compute-intensive functions.
“RISC-V was initially developed to effectively assist specialised computing engines together with mixed-precision operations,” mentioned Krste Asanovic, SiFive chief architect, in a press release. “This, coupled with the inclusion of environment friendly vector directions and the assist of specialised AI extensions, are the explanation why lots of the largest datacenter firms have already adopted RISC-V AI accelerators.”
As a part of his presentation, Asnovic launched extra particulars on the brand new XM Sequence which broadens its Intelligence Product household. The XM Sequence additionally continues SiFive’s legacy of providing extraordinarily excessive efficiency per watt for compute-intensive functions.
That includes 4 X-Cores per cluster, a cluster can ship 16 TOPS (INT8) or 8 TFLOPS (BF16) per GHz. The chip has 1TB/s of sustained reminiscence bandwidth per XM Sequence cluster, with the clusters with the ability to entry reminiscence through a excessive bandwidth port or through a CHI port for coherent reminiscence entry. SiFive envisions the creation of programs incorporating no host CPU or ones primarily based on RISC-V, x86 or Arm. The corporate is sampling its options now.
SiFive shall be on the RISC-V Summit North America, happening Oct. 22-23, 2024 in Santa Clara, California. The corporate has 500 folks.
“We’ve turn into the gold commonplace of RISC-V,” Little mentioned.
